Research on Chip Pin Calibration Method Based on Improved YOLOv11 Model

To address the challenges of traditional chip pin calibration techniques, this study presents a novel method that enhances the YOLOv11 model. Two key improvements are made to the YOLOv11 model: First, the introduced C3k2 module strengthens feature extraction capabilities through a multi-branch convolution structure called Diverse Branch Block (DBB), while the use of reparameterization techniques during inference reduces computational costs. Second, innovative modifications to the feature pyramid structure (Neck) integrate VoVGSCSP and GSConv modules, and leverage upsampling and feature fusion techniques, effectively improving the model's performance in detecting small-sized and densely arranged targets. During dataset construction, images of packaged chips were autonomously collected under white background LED supplemental lighting from multiple angles, resulting in a proprietary image dataset. Detailed annotations were performed using LabelImg, and the dataset was split into training and validation sets. Analysis of experimental results showed the optimized YOLOv11 model outperformed the original across multiple key performance indicators, including accuracy, recall, mAP50, and mAP50-95. Specifically, accuracy improved by 0.045, recall increased by 0.044, mAP50 rose by 0.052, and mAP50-95 enhanced by 0.065.