D-Band SDR with 64 GHz B/W on COTS Chiplets

The D-band (110-170 GHz) is an ideal candidate to address increasing demand in high-speed wireless communication due to its abundant spectrum. Within this 60 GHz band, there are restricted segments, which require high-precision filter responses adhering to regulatory bounds. Additionally, software defined radio (SDR)-based D-band communications that exploit the available bandwidth while complying to spectral mask requirements using real-time Digital Signal Processors (DSPs) are challenging to realize. We demonstrate the ability to sample and process two channels at 64 GS/s, through multi-rate channelization on the digital side. We show digital mixer-based frequency selection of a 4 GHz sub-band anywhere within 0-32 GHz using Intel Altera Stratix-10 AX chiplet platform. The paper is a novel demonstration on the feasibility of 128-phase multirate systolic array processors to process up to 64 GHz of passband in real-time using an Altera FPGA core.