Programmable Cryogenic Memory in a Ge/GeSi Heterostructure

Abstract Programmable memory components that operate optimally at cryogenic temperatures are essential for cryogenic computing architectures that seek to implement computing‐in‐memory. In this work, we demonstrate highly programmable memory in a Ge/GeSi heterostructure field‐effect transistor (HFET). To operate, the HFET is gated to introduce positive carriers within the Ge quantum well, creating a high‐conductance state. We show that this device can be set to a low‐conductance state by sweeping a negative bias on the device drain, and reset it to its high‐conductance state by sweeping a more positive bias on the device gate, thereby creating memory. We then determine that the device can be programmed within a 10 3 range of conductances using either the SET or the RESET operation. We propose that memory is achieved through charge trapping as carriers tunnel out of the quantum well, and that altering the density and spatial distribution of carriers modulates the device conductance. This mechanism exhibits endurance over 1000 cycles at temperatures ≤ 25 K, suggesting that the carrier traps are located at the oxide‐semiconductor interface. As a first demonstration of programmable conductance in a Ge/GeSi HFET, this work highlights the potential of group‐IV HFETs to perform as analog cryogenic memory components.