Novel carrier functions based on CFD for fundamental fortification and improved harmonic profile for multilevel inverters

This paper carved out five novel carrier functions based on Control Freedom Degree (CFD) which is aimed at producing improved fundamental voltage with reduced THD and power loss over wide operating conditions. A pulse rotation unit using digital logic circuit is designed to rotate the proposed novel carrier PWM and fundamental switching signals to balance power loss among the H- Bridges in CHBMLI. The performance of the suggested carrier based PWM strategies are studied in Matlab/Simulink and a laboratory prototype is constituted to validate the simulated results. The study avails Xilinx Spartan 3E FPGA controller for generating PWM signals from the suggested novel carriers to drive the 7- level CHBMLI for generating 7- level output voltage.

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Publication Details

Journal
International Journal of Research in Science and Technology
Published
2025-06-30
DOI
https://doi.org/10.64151/psgcare-8
Primary Topic
HVDC Systems and Fault Protection
Type
article
Field-Weighted Citation Impact
0.00
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article

Novel carrier functions based on CFD for fundamental fortification and improved harmonic profile for multilevel inverters

S. Thamizharasan
International Journal of Research in Science and Technology
HVDC Systems and Fault Protection
article

Novel carrier functions based on CFD for fundamental fortification and improved harmonic profile for multilevel inverters

S. Thamizharasan
article en

Abstract

This paper carved out five novel carrier functions based on Control Freedom Degree (CFD) which is aimed at producing improved fundamental voltage with reduced THD and power loss over wide operating conditions. A pulse rotation unit using digital logic circuit is designed to rotate the proposed novel carrier PWM and fundamental switching signals to balance power loss among the H- Bridges in CHBMLI. The performance of the suggested carrier based PWM strategies are studied in Matlab/Simulink and a laboratory prototype is constituted to validate the simulated results. The study avails Xilinx Spartan 3E FPGA controller for generating PWM signals from the suggested novel carriers to drive the 7- level CHBMLI for generating 7- level output voltage.

International Journal of Research in Science and Technology
Openalex Percentile: Top 86%
HVDC Systems and Fault Protection
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