Junction field-effect transistors based on ZnO/Te heterostructure for UV photodetector and logic inverter with ultralow power consumption

Achieving minimal subthreshold swing (SS) in transistors is crucial for low-voltage operation and reduced power consumption, however, it remains a challenging issue for conventional metal-oxide-semiconductor field-effect transistors due to the complex dielectric engineering. Here, a gate-dielectric free junction field-effect transistor (JFET) is designed based on Te/ZnO van der Waals heterojunction, which exhibits remarkable p-n diode characteristics with a rectifying ratio exceeding 10⁶. By using Te as the gate and ZnO as the channel, the Te/ZnO device demonstrates excellent JFET properties including an on/off ratio of 10⁶, gate leakage current as low as 800 fA, a small pinch-off voltage V_P of -0.31 V, and a minimum sub-threshold swing (SS) of 65 mV dec^-1, nearly approaching the theoretical limit of 60 mV dec^-1. Under 375-nm laser illumination, the Te/ZnO JFET achieves a high responsivity of 160 A W^-1 and detectivity of 9×10¹¹ Jones. Furthermore, a logic inverter is successfully demonstrated with a high gain of 35 and an ultralow power consumption of 6.5 nW. This finding offers a promising pathway to low-power and high-performance electronic applications.