Payload Queueing for Optimizing Complex Header Processing in Programmable Switches

Programmable switches offer a promising platform for fast and flexible in-network computing. However, a standard mechanism, packet recirculation, degrades throughput due to bandwidth consumption caused by the loopback of not only packet headers but also cumbersome payloads. This paper proposes P<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup>QRS, a mechanism that reduces payload recirculation by retaining payloads within the switch. Specifically, P<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup>QRS bifurcates packets into headers and payloads, which undergo the computation process through pipelines and the buffering process leveraging the switch’s queue behavior, respectively. The headers and payloads then rendezvous for reassembly into complete packets to be sent out. To validate its effectiveness, we evaluated P<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup>QRS through both an analytical model and implementation on state-of-the-art hardware programmable switches. Our results demonstrate that P<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup>QRS operates stably and significantly accelerates complex in-switch computations. Moreover, we address packet reordering, which is a fundamental concern arising because P<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup>QRS performs payload buffering on a per-packet basis rather than per-flow. After identifying the mechanism for developing packet reordering in three stages, we design, implement, and evaluate mitigation strategies targeting each stage. These strategies effectively suppress packet reordering in both flow-aware and flow-unaware cases.