Enhancing Cad Workflows: Heterogeneous Graph Attention Networks for Efficient Routing Congestion Prediction in Chip Design

This paper presents a heterogeneous graph attention network for predicting routing congestion on the netlists, crucial for chip design. It features a twolevel attention mechanism to account for netlist structure and design specifications, which previous studies overlooked. Our approach achieves faster and more accurate congestion prediction, with up to 19 % increase in accuracy and up to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5.22 \times$</tex> speedup. It is the first work that integrates design specifications, enabling a comprehensive prediction of congestion.