Circuit Polymorphism Enabled by RFET Devices Processed on Industrial FDSOI
We present three-independent-gate Reconfigurable Field Effect Transistors, processed on a 300 mm industrial platform. The devices, able to function as both n-type and p-type transistors, were built on a GlobalFoundries fully-depleted silicon-on-insulator technology, and show highest symmetry between the on-state currents of both polarity modes, as well as a clearly defined multi-V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</inf> behavior. Based on them, we show electrical transient measurements demonstrating the functionality of a highly reconfigurable logic gate, the RGATE, able to yield up to eight different logic functions using only four transistors. Furthermore, we developed a Verilog-A table model of the presented transistors, that we used to build a 2-bit adder/2-bit half subtract reconfigurable circuit demonstrating the functionality of a highly tiled, security-oriented architecture employing only RGATEs.
Authors
- Yuxuan He (ORCID: https://orcid.org/0000-0002-4325-3783)
- Jens Trommer (ORCID: https://orcid.org/0000-0003-2972-438X)
- Thomas Mikolajick (ORCID: https://orcid.org/0000-0003-3814-0378)
- Jan Hoentschel
- A. Zeun (ORCID: https://orcid.org/0009-0007-0652-236X)
- C. Metze
- Maximilian Drescher
- V. Sessi (ORCID: https://orcid.org/0000-0001-5312-2827)
- Viktor Havel
- Giulio Galderisi (ORCID: https://orcid.org/0000-0002-6997-5370)
- Stefan Slesazeck (ORCID: https://orcid.org/0000-0002-0414-0321)
- Shubham Rai (ORCID: https://orcid.org/0000-0002-6522-5628)
- Maik Simon (ORCID: https://orcid.org/0000-0002-8891-109X)
- Akash S. Kumar (ORCID: https://orcid.org/0000-0001-7125-1737)
- A.-S. Seidel (ORCID: https://orcid.org/0009-0007-8309-4776)
- Niladri Bhattacharjee (ORCID: https://orcid.org/0000-0003-2730-8307)
- M. Grothe
- K. Li
- Sören Jansen
- M. Zier
- K. Ruttloff
- M. Wijvliet
Institutions
- NaMLab (Germany) (DE)
- GlobalFoundries (Germany) (DE)
- Technische Universität Dresden (DE)
Publication Details
- Published
- 2025-03-09
- DOI
- https://doi.org/10.1109/edtm61175.2025.11040419
- Citations
- 3
- Primary Topic
- Physical Unclonable Functions (PUFs) and Hardware Security
- Type
- article
- Field-Weighted Citation Impact
- 6.81