Recent Advances in Compact Modeling for Advanced Semiconductor Technology

A thorough review of recent advances in compact modeling for advanced semiconductor technology is performed. The development of compacting modeling is based on the modeling coordinate system (Fig. 1), which is composed of model applications, modeling techniques, and modeling scenarios. From the perspective of the model application, recent developments include advanced logic devices without/with the backside power delivery network (BSPDN) and their design technology co-optimizations (DTCO), computing memories, cryogenic CMOS, etc. Along the dimension of modeling techniques, recent advancements span AI-assisted modeling and fusion modeling, besides the traditional approaches. In terms of modeling scenarios, dynamic modeling has been discussed more often recently, in addition to the classical static modeling scenarios. By reviewing the modeling coordinate system, we aim to provide a holistic picture of the recent advances for deeper understanding and alignment toward a better compact modeling community.