A 2T2R TCAM Based on RRAM and Accurate Compact Model for A Kilobit Word

Ternary content-addressable memory (TCAM) enables massively parallel search operations but faces challenges in achieving high storage density and area efficiency. This paper proposes a 2-transistor 2-resistor (2T2R) TCAM array architecture using RRAM cells. It can maintain sensing margins for word lengths exceeding 2048 bits with RRAM devices. To validate the concept, Ta/ZnO/TaO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</inf>/Pt RRAM devices are experimentally characterized and a compact model is optimized to fit the measured I-V data with 99.32 % accuracy. Circuit simulations are also conducted to verify its functions.