Ferroelectric 3D NAND Storage (Invited)

In this work, we report a multi-pronged optimization of band engineered ferroelectric field effect transistors with dielectric inserts for NAND solutions for in-storage compute applications: (1) design space exploration for optimizing memory window (MW) and (2) retention alongside (3) a novel disturb mitigation scheme to reduce pass disturb. The optimized device is then leveraged to demonstrate a high density in-storage compute solution for protein identification using open modification search.