Robust OS-FeFETs with Crystallized Anatase-TiO<sub>2</sub> Channel-Hafnia Ferroelectric Layer Stack for Integration of 3D Memory Applications

In this study, the planar and vertical OS-FeFETs were fabricated based on a stack of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex>-channel/HfLaO ferroelectric layers without thermal budget mismatch. The fabricated FeFETs demonstrate exceptional performance and robust stability, including: 1) Memory properties with an on/off ratio exceeding 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup>, a memory window of over 1V, and endurance surpassing 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> cycles; 2) High-temperature operational stability up to 475K and resistance to ambient exposure for over a year. The excellent memory performances and thermal-stability achieved in OS-FeFETs could be owed to material- and process-compatibility between the crystalized <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> channel/HfLaO ferroelectric layers that results in a thermally-stable stack with negligible interfacial interdiffusion.

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Published
2025-03-09
DOI
https://doi.org/10.1109/edtm61175.2025.11041227
Primary Topic
Ferroelectric and Negative Capacitance Devices
Type
article
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article

Robust OS-FeFETs with Crystallized Anatase-TiO2 Channel-Hafnia Ferroelectric Layer Stack for Integration of 3D Memory Applications

Dejin Sun, Xiaojuan Song, Jiahao Kang, C. X. Yu et al.
Ferroelectric and Negative Capacitance Devices
article

Robust OS-FeFETs with Crystallized Anatase-TiO2 Channel-Hafnia Ferroelectric Layer Stack for Integration of 3D Memory Applications

Dejin Sun, Xiaojuan Song, Jiahao Kang, C. X. Yu, X.Y. Liu, Jinpu Zhang, Sijie Li
article en

Abstract

In this study, the planar and vertical OS-FeFETs were fabricated based on a stack of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex>-channel/HfLaO ferroelectric layers without thermal budget mismatch. The fabricated FeFETs demonstrate exceptional performance and robust stability, including: 1) Memory properties with an on/off ratio exceeding 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup>, a memory window of over 1V, and endurance surpassing 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> cycles; 2) High-temperature operational stability up to 475K and resistance to ambient exposure for over a year. The excellent memory performances and thermal-stability achieved in OS-FeFETs could be owed to material- and process-compatibility between the crystalized <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> channel/HfLaO ferroelectric layers that results in a thermally-stable stack with negligible interfacial interdiffusion.

Peking University (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 87%
Ferroelectric and Negative Capacitance Devices
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Robust OS-FeFETs with Crystallized Anatase-TiO<sub>2</sub> Channel-Hafnia Ferroelectric Layer Stack for Integration of 3D Memory Applications — Dejin Sun, Xiaojuan Song, et al. · (2025) | TGRS Research Map | TGRS