A Fan-Out Wafer-Level Packaging-Based THz Communication Transceiver System for High-Speed Chip-to-Chip Wireless Interconnect Applications
This paper presents the design of a THz communication transceiver system based on fan-out wafer-level package (FOWLP) technology for high-speed chip-to-chip (C2C) wireless interconnect applications. The design focus on the transceiver (TR), antenna in package (AiP)s, and interconnect transition structures, integrating coaxial-like structures and coplanar waveguide (CPW) transmission line transitions to enable low-loss signal transmission across both vertical and horizontal pathways. Simulation results show that the proposed FOWLP structures achieve an insertion loss of less than 1 dB and a return loss greater than 10 dB within the 25-60 GHz range for the local oscillator (LO) frequency band. The AiP provides an impedance match of -15 dB within the 200-230 GHz range for the radio frequency (RF) band. Link budget calculations further verify that the proposed system enables C2C communication at data rates up to 10 Gbps, highlighting its potential for advanced interconnect applications.
Authors
- Ya Fei Wu (ORCID: https://orcid.org/0000-0003-4421-1734)
- Shuang Liu (ORCID: https://orcid.org/0000-0002-0587-4415)
- Yang Chai (ORCID: https://orcid.org/0000-0002-8943-0861)
- Yu Jian Cheng (ORCID: https://orcid.org/0000-0003-1075-4167)
- Zong Rui He
Institutions
- Hong Kong Polytechnic University (HK)
- University of Electronic Science and Technology of China (CN)
Publication Details
- Published
- 2025-03-09
- DOI
- https://doi.org/10.1109/edtm61175.2025.11041162
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China