Novel Quasi-Unipolar MOS Pinch-Off Device With Zero-Biased BJT and Its Experiments

A novel quasi-unipolar MOS pinch-off device (MPD) is proposed and experimentally demonstrated in this letter. The MPD integrates a collector-junction zero-biased bipolar junction transistor (z-BJT) and a MOS pinch-off structure. The MOS pinch-off mechanism alleviates the inherent trade-off in conventional JFET where the necessity to sacrifice current capability to reduce the pinch-off voltage <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub>, and a 70% increase in current at the same <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> is facilitated. The z-BJT eliminates hole injection into the P-sub, enabling the MPD to operate in a unipolar mode except for the base region of the BJT. This quasi-unipolar mode leads to a reduced P-sub leakage current by more than 3 orders of magnitude compared to that of conventional high-voltage diode. The MPD has been fabricated on a high voltage Bipolar-CMOS-DMOS (BCD) process platform. Experiments demonstrated that the MPD exhibits a breakdown voltage <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">B</sub> of 832 V, a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> of 20 V, an on-state current exceeding 40 mA, and an off-state substrate leakage current of less than 10 nA. This device has successfully entered large-scale mass production.