Van Der Waals Dielectrics and Electrodes in 2D Transistors for 2T0C DRAM

Two-dimensional (2D) materials, with their atomic-scale thickness, hold promise for next-gen transistors and memory devices. However, integrating high-quality dielectrics on 2D semiconductors is challenging. We introduce a hexagonal boron nitride (h-BN)-assisted process for transferring van der Waals dielectrics and electrodes in 2D transistors. This method maintains clean interfaces, with aluminum oxide <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\left(\text{Al}_{2} \mathrm{O}_{3}\right)$</tex> showing exceptional flatness. The <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{MoS}_{2}$</tex> transistor achieves low interface trap density and leakage current, enabling efficient charge storage and facilitating high-density integration in DRAM applications.