A Model-Driven Design Technology Co-Optimization (DTCO) with Multi-Objective Bayesian Algorithm for Advanced Technology

This work presents a multi-objective Bayesian (MOB) optimization technique for co-optimizing device parameters and digital standard cell libraries (SDC) to deeply explore the technology design space. In contrast to the traditional design based on intrinsic device delay and power, the developed framework unifies the SDC characterizations and the MOB optimization algorithm. With 7nm FinFET as an example, the proposed framework achieves a 20.4% improvement in the power-delay product (PDP) and a 74% increase in hypervolume compared to traditional methods. The basic SDC including NAND, NOR, and XOR are considered with the ASAP7 PDK, and the full library could be covered. This work provides a framework for automating the designtechnology co-optimizations in advanced process nodes.