Thin dielectric to dielectric hydrophilic wafer bonding for FD-SOI and C-FET manufacturing

• Direct bonding involving thin symmetrical dielectric layers may be used for silicon layer transfer for FD-SOI and C-FET technologies. • Scanning Acoustic Microscopy characterization of bonded wafers within thin symmetric dielectric layer. • Hard X-Ray Reflectometry @ ESRF characterization of bonding interface and formation of interfacial nanoclusters is evidenced. • Bonding interface toughness for high transfer quality has been assessed. Direct hydrophilic bonding of silicon structures with low dielectric thickness may lead to the generation of bonding voids during annealing. Yet, silicon layer transfer requires thinner dielectric layers for FD–SOI and C-FET advanced devices. The aim being high bond strengths and low bonding void densities for advanced technological nodes, we show the crucial impact of bonding layer properties on interface sealing and bonding energies.

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Publication Details

Journal
Solid-State Electronics
Published
2025-06-27
DOI
https://doi.org/10.1016/j.sse.2025.109188
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
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article

Thin dielectric to dielectric hydrophilic wafer bonding for FD-SOI and C-FET manufacturing

F. Rieutord, Paul Noël, Didier Landru, Vincent Larrey et al.
Solid-State Electronics
3D IC and TSV technologies
article

Thin dielectric to dielectric hydrophilic wafer bonding for FD-SOI and C-FET manufacturing

F. Rieutord, Paul Noël, Didier Landru, Vincent Larrey, Samuel Tardif, F. Fournel
article en

Abstract

• Direct bonding involving thin symmetrical dielectric layers may be used for silicon layer transfer for FD-SOI and C-FET technologies. • Scanning Acoustic Microscopy characterization of bonded wafers within thin symmetric dielectric layer. • Hard X-Ray Reflectometry @ ESRF characterization of bonding interface and formation of interfacial nanoclusters is evidenced. • Bonding interface toughness for high transfer quality has been assessed. Direct hydrophilic bonding of silicon structures with low dielectric thickness may lead to the generation of bonding voids during annealing. Yet, silicon layer transfer requires thinner dielectric layers for FD–SOI and C-FET advanced devices. The aim being high bond strengths and low bonding void densities for advanced technological nodes, we show the crucial impact of bonding layer properties on interface sealing and bonding energies.

Solid-State ElectronicsVol. 229
Openalex Percentile: Top 87%
3D IC and TSV technologies
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