Live Demonstration: Hardware/Software Co-Design to Exploit RRAM Programmability for Emerging Edge Classification Using ArC TWO
In this demonstration, we present a hardware/software co-design methodology for Convolutional Neural Networks, where the classification section is managed through Resistive RAMs (RRAMs). To this aim, RRAM arrays are mounted onto the ArC TWO instrumentation board, which is interfaced to a laptop. A software Python front-end executes convolutional layers for feature extraction, generates stimuli for RRAMs, and controls the instrumentation board. As a proof of concept, handwritten digits classification is exhibited.
Authors
- Georgios Papandroulidakis (ORCID: https://orcid.org/0000-0002-9203-2557)
- Spyros Stathopoulos (ORCID: https://orcid.org/0000-0002-0833-6209)
- Patrick Foster (ORCID: https://orcid.org/0000-0003-4842-2539)
- Shady Agwa (ORCID: https://orcid.org/0000-0002-6678-6283)
- Cristian Sestito (ORCID: https://orcid.org/0000-0002-7731-0002)
- Themis Prodromakis (ORCID: https://orcid.org/0000-0002-6267-6909)
Institutions
- University of Edinburgh (GB)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11044243
- Primary Topic
- CCD and CMOS Imaging Sensors
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Engineering and Physical Sciences Research Council