Biased Compressor Based Approximate Multiplier Design Using Genetic Algorithm

Multiplication is the cornerstone in a vast array of applications. The employment of approximate multipliers offers a significant advantage in improving system performance. In this work, we conduct an in-depth and comprehensive analysis of various compressors, analyze their error distributions and propose a set of compressors with biased errors. By configuring heterogeneous compressors via a genetic algorithm and optimizing the input order of compressors, we propose several multipliers. Experimental results show that these multipliers have lower power, delay and area consumption compared with the state-of-the-art approximate multipliers. Notably, the AM_4 multiplier, without reducing the accuracy in image recognition and with an image blending PSNR exceeding 50, has reduced the area overhead by 27.3%, power consumption by 49.2%, and delay by 15.2% compared to the precise multiplier.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043336
Primary Topic
Low-power high-performance VLSI design
Type
article
Field-Weighted Citation Impact
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article

Biased Compressor Based Approximate Multiplier Design Using Genetic Algorithm

Shangshang Yao, Jianmin Zhang, Weikang Xu, Yan Sun et al.
Low-power high-performance VLSI design
article

Biased Compressor Based Approximate Multiplier Design Using Genetic Algorithm

Shangshang Yao, Jianmin Zhang, Weikang Xu, Yan Sun, Zhiqiang Wen
article en

Abstract

Multiplication is the cornerstone in a vast array of applications. The employment of approximate multipliers offers a significant advantage in improving system performance. In this work, we conduct an in-depth and comprehensive analysis of various compressors, analyze their error distributions and propose a set of compressors with biased errors. By configuring heterogeneous compressors via a genetic algorithm and optimizing the input order of compressors, we propose several multipliers. Experimental results show that these multipliers have lower power, delay and area consumption compared with the state-of-the-art approximate multipliers. Notably, the AM_4 multiplier, without reducing the accuracy in image recognition and with an image blending PSNR exceeding 50, has reduced the area overhead by 27.3%, power consumption by 49.2%, and delay by 15.2% compared to the precise multiplier.

National University of Defense Technology (CN)
National Key Research and Development Program of China
Openalex Percentile: Top 87%
Low-power high-performance VLSI design
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Biased Compressor Based Approximate Multiplier Design Using Genetic Algorithm — Shangshang Yao, Jianmin Zhang, et al. · (2025) | TGRS Research Map | TGRS