A 9.13-to-15.31 GHz 205.1 dBc/Hz FOM<sub>T</sub> Dual-Core Dual-Mode VCO with Forward Body Bias Technique For Sub-7 GHz Applications

This paper presents a low phase noise (PN) and low power voltage-controlled oscillator (VCO) for Sub-7 GHz applications. We introduce a novel Colpitts VCO with forward body bias technique designed to augment the negative transcon-ductance and to optimize PN. The integration of orthogonal-coupled VCO core is employed for a wide frequency tuning range (FTR) based on the previous frequency expansion developed by the dual-mode, with capacitor banks and varactors. Moreover, a switched varactor unit is employed to realize KVCO linearization and optimize the frequency regulation range. Designed in 65-nm CMOS, the measured results exhibit a low PN of -139.8 dBc/Hz at 10 MHz offset and a figure-of-merit (FOM) of 191.1 dBc/Hz from a 6.108 GHz carrier, while the FTR is 50.6% from 9.13 to 15.31 GHz. The proposed VCO consumes 2.78mW at 0.72-V supply voltage.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043514
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

A 9.13-to-15.31 GHz 205.1 dBc/Hz FOMT Dual-Core Dual-Mode VCO with Forward Body Bias Technique For Sub-7 GHz Applications

Wanqing Wu, Haigang Feng, Xinyi Zhang, Songping Mai et al.
Radio Frequency Integrated Circuit Design
article

A 9.13-to-15.31 GHz 205.1 dBc/Hz FOMT Dual-Core Dual-Mode VCO with Forward Body Bias Technique For Sub-7 GHz Applications

Wanqing Wu, Haigang Feng, Xinyi Zhang, Songping Mai, Xian Tang, Ruiyong Xiang
article en

Abstract

This paper presents a low phase noise (PN) and low power voltage-controlled oscillator (VCO) for Sub-7 GHz applications. We introduce a novel Colpitts VCO with forward body bias technique designed to augment the negative transcon-ductance and to optimize PN. The integration of orthogonal-coupled VCO core is employed for a wide frequency tuning range (FTR) based on the previous frequency expansion developed by the dual-mode, with capacitor banks and varactors. Moreover, a switched varactor unit is employed to realize KVCO linearization and optimize the frequency regulation range. Designed in 65-nm CMOS, the measured results exhibit a low PN of -139.8 dBc/Hz at 10 MHz offset and a figure-of-merit (FOM) of 191.1 dBc/Hz from a 6.108 GHz carrier, while the FTR is 50.6% from 9.13 to 15.31 GHz. The proposed VCO consumes 2.78mW at 0.72-V supply voltage.

Tsinghua University (CN)
Affordable and clean energy
Openalex Percentile: Top 87%
Radio Frequency Integrated Circuit Design
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