A 389μm<sup>2</sup> 26.7nW 8-bit 100kS/s SAR ADC with Hybrid C-CI DAC
An ultra-low power and tiny 8-bit SAR analogto-digital converter (ADC) for biomedical applications is proposed. The proposed SAR ADC introduces a hybrid capacitive-charge injection DAC (C-CI DAC) structure to achieve both high power efficiency and small area. Several methods to minimize the leakage current are used to reduce the power dissipation of the ADC operating at a low clock speed. The proposed C-CI SAR ADC is fabricated in a 28-nm CMOS process and operates from a 0.4-V supply voltage. At a sampling rate of 100 kS/s, the SNDR is 42.57 dB and the power consumption is 26.71 nW. The Walden FOM is 2.43 fJ/convstep and a core area of 389 um<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> is achieved.
Authors
- Kyung‐min Lee (ORCID: https://orcid.org/0000-0001-8381-2423)
- Hyungil Chae (ORCID: https://orcid.org/0000-0002-8550-005X)
- Seungjun Song
Institutions
- Konkuk University (KR)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043782
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00