ACSNN: A 61.25 TOPS/W, 1.65 ns delay SNN Processor that combines CIM-inspired Synapse and Asynchronous Architecture
Spiking Neural Networks (SNNs) offer their biological plausibility and dynamic sensitivity which have gained significant attention in real-time systems. However, designing SNN processors with high throughput and real-time response remains challenging due to high power consumption, high area costs and routing competition. In this paper, we present ACSNN, a processor that integrates a CIM-inspired synapse array, Leaky Integrate-and-Fire (LIF) neurons and asynchronous architecture to achieve high parallelism, high energy and area efficiency while declining routing competition. Experimental results demonstrate an impressive power efficiency of 61.25 TOPS/W and a high peak throughput of 2,415 GOPS with 1.65 ns minimum compute delay, highlighting superior performance and power efficiency compared to state-of-the-art designs.
Authors
- Biao Pan (ORCID: https://orcid.org/0000-0002-9524-7617)
- Yi Zhao (ORCID: https://orcid.org/0000-0001-5368-3595)
- Tingran Chen
- Yueting Li (ORCID: https://orcid.org/0000-0001-8874-6269)
- Kang Wang (ORCID: https://orcid.org/0000-0001-5745-5530)
- Y. Ran (ORCID: https://orcid.org/0009-0005-3107-5720)
Institutions
- Beihang University (CN)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043233
- Primary Topic
- Interconnection Networks and Systems
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Fundamental Research Funds for the Central Universities
- Research and Development