A Digital FLL-based Adaptive Binary LDO for Implantable Medical Devices

This paper presents an efficient, adaptive binary search (ABS) digital low dropout voltage regulator (LDO) for implantable medical devices (IMDs). The proposed regulator eliminates large overshoots associated with the conventional binary search while achieving a tracking speed better than the linear array regulators. The adaptive binary array starts with a 2-bit binary search, and the array size increases with higher load currents. The adaptive binary switch array operates within a digital frequency-locked loop (FLL), implemented using a differential voltage-controlled oscillator (VCO) and a fully digital frequency comparator. The proposed regulator is implemented in a 65 nm CMOS process and has a simulated output voltage of 0.8 V for a 0.24-52.3 mA load current range with a 1 V input. Working with a 1 V power supply, the regulator consumes a quiescent current of 11 µA.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11044250
Primary Topic
Iterative Learning Control Systems
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article
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article

A Digital FLL-based Adaptive Binary LDO for Implantable Medical Devices

Shubham Anand Jain, Rajesh Zele, Chakri Pyla
Iterative Learning Control Systems
article

A Digital FLL-based Adaptive Binary LDO for Implantable Medical Devices

Shubham Anand Jain, Rajesh Zele, Chakri Pyla
article en

Abstract

This paper presents an efficient, adaptive binary search (ABS) digital low dropout voltage regulator (LDO) for implantable medical devices (IMDs). The proposed regulator eliminates large overshoots associated with the conventional binary search while achieving a tracking speed better than the linear array regulators. The adaptive binary array starts with a 2-bit binary search, and the array size increases with higher load currents. The adaptive binary switch array operates within a digital frequency-locked loop (FLL), implemented using a differential voltage-controlled oscillator (VCO) and a fully digital frequency comparator. The proposed regulator is implemented in a 65 nm CMOS process and has a simulated output voltage of 0.8 V for a 0.24-52.3 mA load current range with a 1 V input. Working with a 1 V power supply, the regulator consumes a quiescent current of 11 µA.

Indian Institute of Technology Bombay (IN)
Openalex Percentile: Top 83%
Iterative Learning Control Systems
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A Digital FLL-based Adaptive Binary LDO for Implantable Medical Devices — Shubham Anand Jain, Rajesh Zele, et al. · (2025) | TGRS Research Map | TGRS