Asynchronous Threshold Voltage Defined Logic Family Resistant to LLSI Attacks

Digital Circuits are extremely vulnerable to reverse engineering which can reveal the design and functionality of an integrated circuit (IC) and expose valuable intellectual property (IP). A solution to this problem is to use different IC camouflaging techniques or gates to hinder the attacker’s ability to discover the functionality of the design. One type of camouflaged gate is the Threshold Voltage Defined (TVD) logic family. This gate type uses different threshold voltage transistors to disguise the functionality of the circuit. One of the drawbacks of the TVD logic family is that it is a synchronous logic family which makes it extremely vulnerable to Logic Laser State Imaging (LLSI) Attacks. This paper proposes using handshaking logic to create an asynchronous version of the TVD logic family to remove its vulnerability to LLSI attacks and to increase the speed of the TVD gates.