The Adiabatic Capacitive Neuron: A Cross CMOS Technology Performance Comparison
This paper compares the cross-technology performance of an improved Adiabatic Capacitive Neuron (ACN) design variant. Performance is compared across three commercially available CMOS technologies: two bulk 180nm and 130nm and a 22nm, ultra-low-power Fully-Depleted Silicon-On-Insulator (FDSOI) technology for extreme-edge neuromorphic computing. For comparison, we implement an ACN that is functionally equivalent to a software-trained Artificial Neuron (AN) with binary inputs and outputs, as well as positive, real-valued weights. The paper also demonstrates how back-gate biasing in FDSOI can be used to manipulate the threshold voltage and thus reduce threshold and leakage losses, further enhancing the energy performance of the adiabatic components of the ACN. Simulation results demonstrate that the 22nm technology node dramatically outperforms its 180nm and 130nm counterparts in energy savings, especially at frequencies of 10MHz and above. At 100MHz the synapse energy savings are 4.8x and 3.5x, while the threshold logic savings are 10x and 4.5x when compared to 180nm and 130nm technologies respectively.
Authors
- Alexander Serb (ORCID: https://orcid.org/0000-0002-8034-2398)
- Mike Smart
- Sachin Maheshwari (ORCID: https://orcid.org/0000-0002-9192-2961)
- Himadri Singh Raghav
Institutions
- University of Edinburgh (GB)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043647
- Citations
- 1
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.73
Funders
- Defence Science and Technology Laboratory