LPRE: Logarithmic Posit-enabled Reconfigurable edge-AI Engine

Edge-AI applications face huge challenges in resource-constrained environments, particularly in enhancing computational efficiency within bandwidth limitations. This work proposes the Logarithmic-Posit-enabled Reconfigurable edgeAI Engine (LPRE) that enhances hardware efficiency without compromising accuracy. The proposed architecture utilizes time-multiplexed dynamically configurable single-layer hardware to balance resource reuse and bandwidth for multi-layer perceptron and CNN models. Evaluations on LeNet-5 using MNIST demonstrate that LPRE achieves up to 4× throughput enhancement at 8-bit precision with negligible accuracy loss (compared to FP32 baseline), while requiring up to 80% and 50% fewer resources than fixed-point arithmetic and state-of-the-art works, respectively. The design is viable for various edge-AI applications, such as real-time number plate recognition, offering scalable, energy-efficient IoT solutions.

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Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043622
Citations
4
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
9.08
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LPRE: Logarithmic Posit-enabled Reconfigurable edge-AI Engine

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4 citations
Embedded Systems Design Techniques
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article

LPRE: Logarithmic Posit-enabled Reconfigurable edge-AI Engine

Adam Teman, Gopal Raut, Santosh Kumar Vishvakarma, Omkar Kokane, Mukul Lokhande
article en
4 citations

Abstract

Edge-AI applications face huge challenges in resource-constrained environments, particularly in enhancing computational efficiency within bandwidth limitations. This work proposes the Logarithmic-Posit-enabled Reconfigurable edgeAI Engine (LPRE) that enhances hardware efficiency without compromising accuracy. The proposed architecture utilizes time-multiplexed dynamically configurable single-layer hardware to balance resource reuse and bandwidth for multi-layer perceptron and CNN models. Evaluations on LeNet-5 using MNIST demonstrate that LPRE achieves up to 4× throughput enhancement at 8-bit precision with negligible accuracy loss (compared to FP32 baseline), while requiring up to 80% and 50% fewer resources than fixed-point arithmetic and state-of-the-art works, respectively. The design is viable for various edge-AI applications, such as real-time number plate recognition, offering scalable, energy-efficient IoT solutions.

Centre for Development of Advanced Computing (IN), Bar-Ilan University (IL), Indian Institute of Technology Indore (IN)
Openalex Percentile: Top 2%
Embedded Systems Design Techniques
9.08
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