A 12-bit SAR ADC Utilizing Background Capacitor Calibration with LLM-LMS Algorithm

This work demonstrates a 12-bit SAR ADC using a machine-learning-based LLM-LMS calibration processor to estimate the capacitor mismatch in the background. Three techniques–Learning Rate Decay (LRD), Learning Rate Dynamic-Adjustment (LRDA) and Momentum–were used to enhance the convergence speed of SAR ADC calibration. The LRD technique accelerates the preliminary convergence by gradually reducing the learning rate. The LRDA technique dynamically changes the learning rate based on the magnitude of the gradient, allowing the algorithm to respond quickly to environmental changes and to make precise adjustments as the gradient decreases. The Momentum technique simulates inertia by incorporating the influence of previous updates, which accelerates convergence and minimizes oscillations. Together, these techniques successfully improve the convergence speed and overall performance of the SAR ADC calibration process. Monte Carlo simulation results show that the worst ENOB improves from 8.3 bits to 10.4 bits, after using the proposed LLM-LMS calibration.