Stack-based Ensemble Learning for Performance Indirect Testing of Analog Integrated Circuits
Performance testing of analog integrated circuits (ICs) is essential before deployment and real-world use. The conventional method for testing ICs’ specifications relied on complex test circuits and diverse stimuli with high time and hardware costs. To reduce costs, we propose a two-stage testing framework of analog ICs that employs ensemble learning technology. In the first stage, we explore the mapping of a single response, generated by the test circuit upon stimulation, to multiple target specifications for testing. In particular, the framework could include multiple types of responses to ensure the testing accuracy of each specification. In the second stage, we investigate the strategy of combining the different predictions to the final test results. The results of the simulation experiments indicate that, within the framework of indirect testing, the proposed method can fuse the predicted specifications from multiple responses to enhance the testing accuracy of each specification.
Authors
- Houjun Wang (ORCID: https://orcid.org/0000-0001-7110-717X)
- Hao Li (ORCID: https://orcid.org/0000-0002-8432-8796)
- Zhigang Wang (ORCID: https://orcid.org/0000-0001-5253-3114)
- Jiawei Cao (ORCID: https://orcid.org/0009-0009-4871-9712)
Institutions
- University of Electronic Science and Technology of China (CN)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043288
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China
- China Postdoctoral Science Foundation
- Natural Science Foundation of Sichuan Province