A 2.43 mW Multi-frequency Electrical Impedance Tomography ASIC with Dual-Mode Impedance Readout

This paper presents a multi-frequency time-variance-based Electrical Impedance Tomography (EIT) ASIC, designed to balance high-speed performance with low power consumption for biomedical applications. The ASIC leverages a dual-mode impedance readout architecture, incorporating time-to-digital demodulation at high frequencies and digital I-Q demodulation at low frequencies, which together address limitations in conventional EIT systems regarding data acquisition speed and power efficiency. The proposed system includes a current generator with an integrated auto-calibration scheme and a flexible clock generator with multiple PLLs, supporting a wide frequency range from 15.6 kHz to 1 MHz. Fabricated in a 65 nm CMOS process, the ASIC achieves a total power consumption of 2.43 mW and enables detailed multi-frequency impedance analysis while maintaining compactness and cost-effectiveness. In-vitro measurements with water tank validate its efficacy in different frequency-dependent impedance changes.

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Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11044223
Primary Topic
Electrical and Bioimpedance Tomography
Type
article
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article

A 2.43 mW Multi-frequency Electrical Impedance Tomography ASIC with Dual-Mode Impedance Readout

Jiayang Li, Andreas Demosthenous, Dai Jiang
Electrical and Bioimpedance Tomography
article

A 2.43 mW Multi-frequency Electrical Impedance Tomography ASIC with Dual-Mode Impedance Readout

Jiayang Li, Andreas Demosthenous, Dai Jiang
article en

Abstract

This paper presents a multi-frequency time-variance-based Electrical Impedance Tomography (EIT) ASIC, designed to balance high-speed performance with low power consumption for biomedical applications. The ASIC leverages a dual-mode impedance readout architecture, incorporating time-to-digital demodulation at high frequencies and digital I-Q demodulation at low frequencies, which together address limitations in conventional EIT systems regarding data acquisition speed and power efficiency. The proposed system includes a current generator with an integrated auto-calibration scheme and a flexible clock generator with multiple PLLs, supporting a wide frequency range from 15.6 kHz to 1 MHz. Fabricated in a 65 nm CMOS process, the ASIC achieves a total power consumption of 2.43 mW and enables detailed multi-frequency impedance analysis while maintaining compactness and cost-effectiveness. In-vitro measurements with water tank validate its efficacy in different frequency-dependent impedance changes.

University College London (GB)
Affordable and clean energy
Openalex Percentile: Top 87%
Electrical and Bioimpedance Tomography
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A 2.43 mW Multi-frequency Electrical Impedance Tomography ASIC with Dual-Mode Impedance Readout — Jiayang Li, Andreas Demosthenous, et al. · (2025) | TGRS Research Map | TGRS