FARMER: An Online-Learning Driven Methodology for Workload Consolidation on Large FPGAs
With the ever-increasing demand for performance and scalability in cloud applications, high-performance computing (HPC) facilities are starting to include FPGAs for workload acceleration. To efficiently exploit the massive amount of resources of high-end FPGAs, it is paramount to optimize the allocation of multiple applications on a single device. This paper proposes FARMER, a novel online learning methodology harnessing the power of Gaussian Process regression to model the throughput of different applications running on the same FPGA, and a sequential decision-making approach to explore the available configurations efficiently. Experimental results considering a large variety of representative scenarios tested on a real prototyping platform featuring an AMD Virtex-7 FPGA show that FARMER always finds a feasible solution with an exploration of less than 0.1% of the whole design space.
Authors
- Davide Zoni (ORCID: https://orcid.org/0000-0002-9951-062X)
- Francesco Trovò (ORCID: https://orcid.org/0000-0001-5796-7667)
- Gabriele Montanaro (ORCID: https://orcid.org/0000-0003-1119-2629)
Institutions
- Politecnico di Milano (IT)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043238
- Citations
- 2
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 4.54