FARMER: An Online-Learning Driven Methodology for Workload Consolidation on Large FPGAs

With the ever-increasing demand for performance and scalability in cloud applications, high-performance computing (HPC) facilities are starting to include FPGAs for workload acceleration. To efficiently exploit the massive amount of resources of high-end FPGAs, it is paramount to optimize the allocation of multiple applications on a single device. This paper proposes FARMER, a novel online learning methodology harnessing the power of Gaussian Process regression to model the throughput of different applications running on the same FPGA, and a sequential decision-making approach to explore the available configurations efficiently. Experimental results considering a large variety of representative scenarios tested on a real prototyping platform featuring an AMD Virtex-7 FPGA show that FARMER always finds a feasible solution with an exploration of less than 0.1% of the whole design space.

Authors

Institutions

Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043238
Citations
2
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
4.54
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

FARMER: An Online-Learning Driven Methodology for Workload Consolidation on Large FPGAs

Davide Zoni, Francesco Trovò, Gabriele Montanaro
2 citations
Embedded Systems Design Techniques
4.54
article

FARMER: An Online-Learning Driven Methodology for Workload Consolidation on Large FPGAs

Davide Zoni, Francesco Trovò, Gabriele Montanaro
article en
2 citations

Abstract

With the ever-increasing demand for performance and scalability in cloud applications, high-performance computing (HPC) facilities are starting to include FPGAs for workload acceleration. To efficiently exploit the massive amount of resources of high-end FPGAs, it is paramount to optimize the allocation of multiple applications on a single device. This paper proposes FARMER, a novel online learning methodology harnessing the power of Gaussian Process regression to model the throughput of different applications running on the same FPGA, and a sequential decision-making approach to explore the available configurations efficiently. Experimental results considering a large variety of representative scenarios tested on a real prototyping platform featuring an AMD Virtex-7 FPGA show that FARMER always finds a feasible solution with an exploration of less than 0.1% of the whole design space.

Politecnico di Milano (IT)
Decent work and economic growth
Openalex Percentile: Top 6%
Embedded Systems Design Techniques
4.54
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.