FPGA-Based Automated Coin Recognition and Denomination System

This paper presents a novel Accelerated coin recognition and counting system leveraging Field Programmable Gate Array (FPGA) technology to address the challenges of diverse coin features in complex monetary environments like India. The proposed solution utilizes a PYNQ Z2 FPGA board integrated with an OV5650 camera module, implemented in Hardware Description Language (HDL) and High level Synthesis (HLS) along with HLS4ML framework interface. By using the FPGA's high-speed and parallel processing capabilities and reconfigurability, the system offers precise coin detection and denomination, which will potentially transform the financial transactions process across nations.