A Systematic Methodology for Time-multiplexing Algorithms on a Reconfigurable System-on-Chip
This paper introduces a methodology for hardware-software co-implementation, designed to simplify the System-on-Chip (SoC) design process when attempting to time-multiplex hardware. The approach streamlines the transformation of complex algorithms into efficient SoC implementations by providing a recipe for seamless hardware-software partitioning. As a case study, the methodology is applied to the Extrapolated Single Propagation Particle Filter algorithm for geo-locating sources of radio frequency interference and results demonstrate a considerable speed-up when using a time-multiplexed implementation.
Authors
- Duc Dung Vu (ORCID: https://orcid.org/0000-0001-8273-9965)
- Ediz Cetin (ORCID: https://orcid.org/0000-0002-9313-3034)
- Alan Kan (ORCID: https://orcid.org/0000-0001-6033-0958)
- Sanat K. Biswas (ORCID: https://orcid.org/0000-0002-2043-7467)
Institutions
- Indraprastha Institute of Information Technology Delhi (IN)
- Indian Institute of Technology Delhi (IN)
- Macquarie University (AU)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043191
- Citations
- 2
- Primary Topic
- Interconnection Networks and Systems
- Type
- article
- Field-Weighted Citation Impact
- 2.97