A 12-bit 1-MS/s 2-bit/cycle Asynchronous SAR ADC for MEMS Inertial Sensors Readout
A 12-bit successive-approximation register (SAR) analog-to-digital converter (ADC) in 180-nm CMOS is presented. Designed for the readout of inertial sensors in micro-electromechanical systems (MEMS) technology, it combines an asynchronous control scheme with a 2-bit per cycle architecture achieving enhanced energy efficiency. Operating at a 1-MS/s sampling rate, the proposed ADC draws 8.9-µA of total current from a 1.8-V supply. Additionally, it demonstrates an SNDR of 63.2 dB across the entire Nyquist bandwidth, resulting in a Walden figure-of-merit (FoM) of 13.6 fJ/conv-step. The achieved energy efficiency makes the proposed ADC suitable for battery-powered applications requiring medium resolution and data rate.
Authors
- Edoardo Bonizzoni (ORCID: https://orcid.org/0000-0002-8398-8506)
- P. Malcovati (ORCID: https://orcid.org/0000-0001-6514-9672)
- Antonio Aprile (ORCID: https://orcid.org/0000-0003-3918-9296)
- Michele Folz (ORCID: https://orcid.org/0009-0000-1138-6808)
- A. Colombi (ORCID: https://orcid.org/0000-0001-9991-4029)
- Daniele Gardino (ORCID: https://orcid.org/0009-0007-6988-8350)
Institutions
- University of Pavia (IT)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043260
- Primary Topic
- CCD and CMOS Imaging Sensors
- Type
- article
- Field-Weighted Citation Impact
- 0.00