Piecewise Linear Performance Models for Analog Mixed-Signal Verification

Behavioral models are used to describe the statistical behavior of subsystems that are too large for circuit simulation using SPICE. However, performance estimations obtained using these approaches are typically accurate only for relatively simple circuits, where the performance has a linear dependence on the variation parameters of the circuit. In this work, we introduce statistical performance models that employ piecewise linear regression (PWLR) to model circuit nonlinearity and interblock correlations for use within a hierarchical approach. Our algorithm uses sensitivity-based dimensionality reduction and k-means clustering to ensure that the nonlinear models for the circuit are efficient. The advantage of using PWLR models is illustrated using a current mirror and a charge pump under process, voltage and temperature (PVT) variations.