Fully Integrated Dynamic Power Cell Allocation SIDO SC DC-DC Converter with a 263.8mV/ns DVS Speed and a 19.8ns Transient Recovery Time

This paper presents a fully integrated single-input-dual-output (SIDO) SC DC-DC converter targeting on fast dynamic voltage scaling (DVS) and fast transient response applications. By applying the proposed cell-level 3-step transition sequence with multi-phase interleaving, this work can enable multiple output C<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LOAD</inf>-free operation with fast and robust dynamic voltage scaling (DVS) operation. The proposed PFM loop with on-demand S/H and power boundary control, together with the load transient enhancement control can also ensure dynamic power cell allocation to achieve full power utilization and a fast load transient response. Fabricated in standard 65nm CMOS, the proposed converter achieves SIDO operation with step-down VCRs of 5:4/3/2/1. At V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IN</inf> = 1.2V, this work achieves a measured peak power conversion efficiency (PCE) of 83%, a fast DVS speed of 263.8mV/ns, and a fast transient recovery time of 19.8ns. It also demonstrates a measured PCE improvement of up to 6.7% under full power cell utilization.