Dynamic Quantization and Pruning for Efficient CNN-Based Road Sign Recognition on FPGA

In this paper, we present an optimized implementation of Convolutional Neural Network (CNN) for road sign recognition on an FPGA platform, utilizing dynamic quantization and pruning techniques. Traditional CNN models are computationally intensive and require significant memory, which poses challenges for deployment on resource-limited hardware such as FPGA. To address these challenges, a hybrid approach was proposed combining dynamic quantization with pruning, allowing layer-specific precision adjustment while removing unnecessary network connections. This method significantly reduces the computational complexity and memory usage while maintaining high accuracy in road sign recognition tasks. The quantized and pruned model is implemented on the Tang Primer 25K FPGA, demonstrating efficient hardware utilization and real-time performance. Experimental results show that the proposed approach substantially reduces power consumption and resource utilization, with minimal impact on accuracy, making it highly suitable for embedded systems and edge computing applications.