Enhanced Time Amplifier with Trimming Voltage for Error Reduction in Time-to-Digital Converters
Time amplifiers are crucial integrated circuit design components enabling ultra-fast communication systems and precise time-domain measurements. This paper presents a new iteration of a time amplifier, specifically engineered to enhance its functionality through the incorporation of a trimming voltage and additional capacitors in its delay cells. These modifications have been devised to effectively mitigate output errors and minimize variations in the amplified pulse width, thereby significantly refining the overall precision of the time amplifier. Measurement results demonstrate that the proposed time amplifier achieves an improvement of 46.43% in the output error compared to its conventional counterpart. Furthermore, when incorporating this time amplifier into the structure of a Nutt-based Time-to-Digital Converter, it exhibits a 62.16% reduction in output error compared to the conventional time amplifier implementation.
Authors
- Javad Ahmadi-Farsani
- Ion Vornicu (ORCID: https://orcid.org/0000-0001-6865-5116)
- Laurentiu Acasandrei
Institutions
- Silicon Austria Labs (Austria) (AT)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043448
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Silicon Austria Labs