Stacked Ring Oscillator Design for Broadband Memory Testing from 3MHz to 3.7GHz
In this paper, we propose a current-injected five-stacked ring oscillator with virtual power switches for generating an on-chip clock to test broadband memory operations. Clock signals across a wide frequency range are required to evaluate the functionality and frequency-specific characteristics of memory devices. Ring oscillator circuits are known for being some of the simplest and smallest circuits for generating clocks. However, as technology advances and processes shrink, generating low-frequency clocks using only ring oscillators in terms of area and power becomes increasingly difficult. To address this challenge, we introduce current-injected stacked ring oscillators and control broadband frequencies using virtual power and a power switch connected to the virtual ground. Furthermore, we present two types of tri-state inverter control techniques to manage the duty cycles of both high-frequency and low-frequency clocks, ensuring clean duty control while optimizing area efficiency. The proposed circuit is designed using a 28nm FDSOI process with a supply voltage of 1.8V. The entire prototype chip covers an area of 0.00238mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.
Authors
- Kang‐Yoon Lee (ORCID: https://orcid.org/0000-0001-9777-6953)
- Dong-Ho Shin
- JunHa Lee
Institutions
- Sungkyunkwan University (KR)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043942
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00