CAMEL: Capacitive Analog In-Memory Equalization for RF Signal Processing

As next-generation wireline and wireless systems are scaled to meet increasing data demands, existing signal processing approaches face significant power and latency challenges. To address these demands, we present CAMEL (Capacitive Analog In-Memory Equalization), a mixed-signal, discrete-time, analog in-memory switched-capacitor finite impulse response (FIR) filter designed in Intel16. Using this filter as a core, we develop a 16-tap antenna-domain I/Q equalizer, with 8-bit accuracy, consuming 90 mW from a 1 V supply, while achieving a data rate of 2 Gbps at a bit error rate (BER) of 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−4</sup> in a realistic channel at 18 dB signal-to-noise ratio (SNR). Mismatch analysis and scaling studies indicate that this design can be extended to 12 bit and 48-tap configurations with linear increase in power, while delivering full digital reconfigurability, and datarates exceeding 5 Gbps with a power efficiency of 9.81 pJ/bit.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11044196
Primary Topic
Advanced Memory and Neural Computing
Type
article
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CAMEL: Capacitive Analog In-Memory Equalization for RF Signal Processing

Siddharth Joshi, Richard Dorrance, Kshama Lakshmi Ranganatha, Md. Shahrul Islam
Advanced Memory and Neural Computing
article

CAMEL: Capacitive Analog In-Memory Equalization for RF Signal Processing

Siddharth Joshi, Richard Dorrance, Kshama Lakshmi Ranganatha, Md. Shahrul Islam
article en

Abstract

As next-generation wireline and wireless systems are scaled to meet increasing data demands, existing signal processing approaches face significant power and latency challenges. To address these demands, we present CAMEL (Capacitive Analog In-Memory Equalization), a mixed-signal, discrete-time, analog in-memory switched-capacitor finite impulse response (FIR) filter designed in Intel16. Using this filter as a core, we develop a 16-tap antenna-domain I/Q equalizer, with 8-bit accuracy, consuming 90 mW from a 1 V supply, while achieving a data rate of 2 Gbps at a bit error rate (BER) of 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−4</sup> in a realistic channel at 18 dB signal-to-noise ratio (SNR). Mismatch analysis and scaling studies indicate that this design can be extended to 12 bit and 48-tap configurations with linear increase in power, while delivering full digital reconfigurability, and datarates exceeding 5 Gbps with a power efficiency of 9.81 pJ/bit.

University of Notre Dame (US), Intel (United States) (US)
Affordable and clean energy
Openalex Percentile: Top 87%
Advanced Memory and Neural Computing
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