Long-Short-GNN: A Novel Graph Neural Network for Detecting FPGA IP Circuits for Hardware Assurance

Hardware Assurance (HA) of Integrated Circuit (IC) requires the extraction and analysis of circuit netlist from a manufactured or programmed IC (in the case of Field Programmable Gate Array (FPGA)). The first and most important step in this analysis is to detect Intellectual Property (IP) circuit(s) of interest from an extracted ‘sea-of-gates’ netlist. State-of-the-art approach involves converting the extracted netlist into a graph and using Graph Neural Network (GNN), a powerful machine-learning method on graphs for IP circuit detection. However, reported methods usually employed shallow GNNs with small receptive fields which are inadequate for detecting large and complete IP circuits. In this paper, we propose a novel GNN, coined Long-Short-GNN, which uniquely incorporates a Long-view Network (for global coarse-grained information) and a Short-view Network (for local fine-grained information) for FPGA IP circuit detection. By experiments on detecting a variety of large and complete FPGA IP circuits, we proved its efficacy. Specifically, on average, our proposed Long-Short-GNN outperformed all reported methods by a large margin of up to ~13.8% improvement on F1 Score.