A 41.7 MS/s 2.4 ps-rms-jitter Time Converter With 4-Core Interleaved Analog-Multiplexed Architecture

This paper presents a single channel time-to-amplitude converter (TAC) that exploits an on-chip time-interleaving technique to reach an unprecedented conversion rate. Implemented in a 350-nm SiGe process, the TAC features a high conversion rate of up to 41.7 MS/s and a timing jitter of just 2.4 ps-rms over a configurable full-scale range (FSR), selectable among 4 binary-scaled options ranging from 12.5 to 100 ns. The TAC exhibits a peak-to-peak DNL of 0.9% and a maximum INL of 1.2% of the LSB, ensuring linearity across the entire FSR.