Design of a spurious-free VCO-ADC for Audio

Analog-to-digital converters based on voltage-controlled oscillators (VCO-ADCs) can be employed in the readout circuit of a Microelectromechanical system (MEMS) microphone, as an alternative to classical voltage-encoding architectures. In the presence of a high sound pressure, larger than the microphone Acoustic Overload Point (AOP), or after a mechanical shock is applied to the sensor, undesired audible artifacts generated by spurious tones falling into the audio band can appear, impairing the shock recovery capability of the microphone. This paper presents a spurious-free VCO-ADC suitable for audio applications. The proposed idle-tone mitigation mechanism is based on introducing a sampling inaccuracy in the form of clock jitter modulation. Measurements of an ASIC implemented in 130 nm CMOS technology show the effectiveness of the proposed solution.

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Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043577
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

Design of a spurious-free VCO-ADC for Audio

Andrés Quintero, Carlos Perez, Andreas Wiesbauer, Dietmar Straeussnigg et al.
Analog and Mixed-Signal Circuit Design
article

Design of a spurious-free VCO-ADC for Audio

Andrés Quintero, Carlos Perez, Andreas Wiesbauer, Dietmar Straeussnigg, Pedro Amaral
article en

Abstract

Analog-to-digital converters based on voltage-controlled oscillators (VCO-ADCs) can be employed in the readout circuit of a Microelectromechanical system (MEMS) microphone, as an alternative to classical voltage-encoding architectures. In the presence of a high sound pressure, larger than the microphone Acoustic Overload Point (AOP), or after a mechanical shock is applied to the sensor, undesired audible artifacts generated by spurious tones falling into the audio band can appear, impairing the shock recovery capability of the microphone. This paper presents a spurious-free VCO-ADC suitable for audio applications. The proposed idle-tone mitigation mechanism is based on introducing a sampling inaccuracy in the form of clock jitter modulation. Measurements of an ASIC implemented in 130 nm CMOS technology show the effectiveness of the proposed solution.

Infineon Technologies (Austria) (AT)
Openalex Percentile: Top 86%
Analog and Mixed-Signal Circuit Design
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