Lightweight FPGA Implementation of the Shadow PUF Module for Generating Reconfigurable Proxy PUFs

Physically unclonable functions (PUFs) are hardware security primitives with notable success in secure key generation applications, but have been faced with challenges in device authentication applications. This paper provides an FPGA implementation of the Shadow PUF design for generating reconfigurable PUFs to mitigate the dangers posed by modeling attacks. The proposed design is scalable with sampled randomness and uniqueness values averaging 48.88% and 48.05%, respectively. The selected design for the proof-of-concept implementation utilized 239 logic cells (LCs) and 256 bits of memory on an iCE40 HX1K FPGA—highlighting the proposed design as a viable security core for even the most resource-constrained devices.