A Replica Driverless Common/Differential Mode Hybrid for Full-Duplex Signaling in Serial Links

This paper presents a current mode (CM) replica driverless full-duplex simultaneous bidirectional (FD-SBD) signaling transceiver for chip-to-chip interconnect. For FD-SBD signaling a hybrid architecture is used to extract the received signal from the channel by canceling the transmitted signal. However, the pin package parasitics at the interface increases the near-end reflection and increases the cancellation error which reduces the received signal eye opening. Reducing the cancellation error by using filters increases the power consumption along with the complexity. In the case of single-ended full-duplex signaling with dedicated wires for transmitting and receiving, the received signal eye opening is affected significantly by the cross-talk and power supply noise. Therefore, in this work a hybrid of differential and common mode signaling is used to reduce the cancellation error and common-mode noise to increase the data rate. The proposed transceiver does not require an additional replica driver to retrive the received signal unlike conventional transceivers. The architecture is designed using 65 nm CMOS technology for a 7.5-inch channel with 6.46 dB insertion loss at 5 GHz Nyquist frequency. An aggregate full-duplex data rate of 30 Gb/s with an energy efficiency of 0.43 pJ/b is achieved in this work.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11044294
Primary Topic
Full-Duplex Wireless Communications
Type
article
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article

A Replica Driverless Common/Differential Mode Hybrid for Full-Duplex Signaling in Serial Links

Nijwm Wary, B. Shabalin, Bibhu Datta Sahoo, Pankaj Kumar et al.
Full-Duplex Wireless Communications
article

A Replica Driverless Common/Differential Mode Hybrid for Full-Duplex Signaling in Serial Links

Nijwm Wary, B. Shabalin, Bibhu Datta Sahoo, Pankaj Kumar, V. K. Surya
article en

Abstract

This paper presents a current mode (CM) replica driverless full-duplex simultaneous bidirectional (FD-SBD) signaling transceiver for chip-to-chip interconnect. For FD-SBD signaling a hybrid architecture is used to extract the received signal from the channel by canceling the transmitted signal. However, the pin package parasitics at the interface increases the near-end reflection and increases the cancellation error which reduces the received signal eye opening. Reducing the cancellation error by using filters increases the power consumption along with the complexity. In the case of single-ended full-duplex signaling with dedicated wires for transmitting and receiving, the received signal eye opening is affected significantly by the cross-talk and power supply noise. Therefore, in this work a hybrid of differential and common mode signaling is used to reduce the cancellation error and common-mode noise to increase the data rate. The proposed transceiver does not require an additional replica driver to retrive the received signal unlike conventional transceivers. The architecture is designed using 65 nm CMOS technology for a 7.5-inch channel with 6.46 dB insertion loss at 5 GHz Nyquist frequency. An aggregate full-duplex data rate of 30 Gb/s with an energy efficiency of 0.43 pJ/b is achieved in this work.

University at Buffalo, State University of New York (US), Indian Institute of Technology Bhubaneswar (IN)
Affordable and clean energy
Openalex Percentile: Top 87%
Full-Duplex Wireless Communications
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A Replica Driverless Common/Differential Mode Hybrid for Full-Duplex Signaling in Serial Links — Nijwm Wary, B. Shabalin, et al. · (2025) | TGRS Research Map | TGRS