Circuit-Level Model of the Memristor Based on Piecewise Linear Functions Derived From Experimental Electrical Characteristics
Designing devices with memristor arrays requires simultaneous simulations of a large number of memristors. The use of detailed physical models limits the size of memristor arrays during simulations due to the large amount of computation. Therefore, it is necessary to use more simplified circuit models to simulate such arrays. For this purpose, a compact circuit-level model of a bipolar memristor based on tabular 2-D piecewise linear (PWL) functions of two variables in equations for current and state parameter change has been developed. Unlike existing models, the equation for electric current is specified in the form of a tabular function with a large number of linear sections. A method for restoring these tabular functions from experimental data has been proposed. It is shown quantitatively that the designed model reproduces the current–voltage characteristics of bipolar memristors made of various materials much more accurately than known models. Simulations using tabular functions are computationally faster compared to known memristor models. Thus, the developed model allows implementing a generalized approach to construct computationally efficient memristor models instead of selecting unique approximating functions for specific material combinations.
Authors
- Alexander N. Busygin (ORCID: https://orcid.org/0000-0002-3439-8067)
- S. Yu. Udovichenko (ORCID: https://orcid.org/0000-0003-3583-7081)
- Oleg Maevsky (ORCID: https://orcid.org/0000-0002-8759-474X)
- Abdulla Ebrahim
- Alexander A. Neustroev
Institutions
- University of Tyumen (RU)
Publication Details
- Journal
- IEEE Transactions on Electron Devices
- Published
- 2025-06-27
- DOI
- https://doi.org/10.1109/ted.2025.3582217
- Citations
- 1
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.73
Funders
- Russian Science Foundation