GraphDiffusion: A Graph-conditioned Diffusion Model for Chip Placement

Placement is a crucial and time-intensive step in the modern Electronic Design Automation (EDA) chip design process, involving the allocation of millions of modules on a chip canvas. Previous studies have demonstrated the efficacy of machine learning methods, especially reinforcement learning (RL) in chip placement. However, existing RL-based methods still face challenges, including lengthy placement times due to placing only a single module at each step, and a lack of generalization capability. In response to these challenges, we propose a Graph Convolutional Network (GCN)-based diffusion model called GraphDiffusion. Our model presents a novel approach for chip placement by representing the positioning of movable nodes as a conditional denoising diffusion process. The GCN is utilized to extract feature information from the circuit, which then serves as an embedding to guide the diffusion model in generating the chip layout. We exploit the diffusion model’s capabilities to improve layout quality and generalizability. We conduct extensive experiments on the ISPD benchmark. The results demonstrate that our approach outperforms advanced placement methods while enhancing the transferability of the layout model. Upon training with expert data, GraphDiffusion can interpret the input circuit netlists and generate state-of-the-art chip layouts.