Data Rate Enhancement in Ultrasonic Data Telemetry Links: Surpassing Conventional Limits to Achieve Up to 2.2 Mbps Using a 1 MHz Transducer Pair

This paper presents the design, simulation, and experimental evaluation of an ultrasonic data telemetry scheme with significant data rate enhancements. In the proposed idea a symbol-wise approach is employed that achieves a data rate of up to 2.2 Mbps and a symbol rate of 250 kBd. using a single 1 MHz transducer pair. As a part of the proposed scheme, an ASIC receiver circuit is proposed that introduces a baseline crossing method for efficient data recovery. The receiver circuit is designed in TSMC 180-nm CMOS technology, consumes 3.97 µW of power with a supply voltage of 1.2V and occupies a silicon area of 76 µm by 24 µm. In addition, the experimental results validate the effectiveness of the design, with a bit error rate of 7.8×10⁻⁴, providing a high-performance and power-efficient solution for ultrasonic data telemetry links.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043476
Citations
1
Primary Topic
Power Line Communications and Noise
Type
article
Field-Weighted Citation Impact
0.73
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article

Data Rate Enhancement in Ultrasonic Data Telemetry Links: Surpassing Conventional Limits to Achieve Up to 2.2 Mbps Using a 1 MHz Transducer Pair

Yousef Khazaei, Amir M. Sodagar
1 citations
Power Line Communications and Noise
0.73
article

Data Rate Enhancement in Ultrasonic Data Telemetry Links: Surpassing Conventional Limits to Achieve Up to 2.2 Mbps Using a 1 MHz Transducer Pair

Yousef Khazaei, Amir M. Sodagar
article en
1 citations

Abstract

This paper presents the design, simulation, and experimental evaluation of an ultrasonic data telemetry scheme with significant data rate enhancements. In the proposed idea a symbol-wise approach is employed that achieves a data rate of up to 2.2 Mbps and a symbol rate of 250 kBd. using a single 1 MHz transducer pair. As a part of the proposed scheme, an ASIC receiver circuit is proposed that introduces a baseline crossing method for efficient data recovery. The receiver circuit is designed in TSMC 180-nm CMOS technology, consumes 3.97 µW of power with a supply voltage of 1.2V and occupies a silicon area of 76 µm by 24 µm. In addition, the experimental results validate the effectiveness of the design, with a bit error rate of 7.8×10⁻⁴, providing a high-performance and power-efficient solution for ultrasonic data telemetry links.

York University (CA)
Affordable and clean energy
Openalex Percentile: Top 27%
Power Line Communications and Noise
0.73
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