Approximate SRAM-Based Memory System for Intra-Frame Prediction in VVC Encoders

This paper introduces a memory system for the Versatile Video Coding (VVC) standard, aimed at optimizing energy consumption in intra-frame prediction through approximate storage techniques. We propose a system that employs data approximation due to dynamic voltage scaling Static Random Access Memory (SRAM) in two distinct buffers: the Neighbor Samples Buffer (NeighSB) and the Original Samples Buffer (OrigSB). Our findings indicate the feasibility of approximate storage exploitation of our memory system, with minor coding efficiency drops at controlled error rates. As NeighSB and OrigSB presented distinct resilience behaviors, we evaluate different approximation strengths to obtain the most suitable coding efficiency, enabling still effective energy savings. Finally, we investigate the energy savings achieved through different SRAM operation levels, yielding reductions of 42%-62%.

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Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043321
Citations
1
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
2.27
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Approximate SRAM-Based Memory System for Intra-Frame Prediction in VVC Encoders

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article

Approximate SRAM-Based Memory System for Intra-Frame Prediction in VVC Encoders

Daniel Palomino, Matheus Isquierdo, Bruno Zatt, Felipe Sampaio, Yasmin Camargo
article en
1 citations

Abstract

This paper introduces a memory system for the Versatile Video Coding (VVC) standard, aimed at optimizing energy consumption in intra-frame prediction through approximate storage techniques. We propose a system that employs data approximation due to dynamic voltage scaling Static Random Access Memory (SRAM) in two distinct buffers: the Neighbor Samples Buffer (NeighSB) and the Original Samples Buffer (OrigSB). Our findings indicate the feasibility of approximate storage exploitation of our memory system, with minor coding efficiency drops at controlled error rates. As NeighSB and OrigSB presented distinct resilience behaviors, we evaluate different approximation strengths to obtain the most suitable coding efficiency, enabling still effective energy savings. Finally, we investigate the energy savings achieved through different SRAM operation levels, yielding reductions of 42%-62%.

Universidade Federal de Pelotas (BR), Instituto Federal de Educação, Ciência e Tecnologia do Rio Grande do Sul (BR), Instituto Federal Farroupilha (BR)
Affordable and clean energy
Openalex Percentile: Top 14%
VLSI and Analog Circuit Testing
2.27
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