Live Demonstration: ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications

The use of IoT devices has increased significantly in recent years, and edge computing in IoT is seen as a new and growing trend in the technology industry. While cryptography is widely used to enhance the security of IoT devices, it also has limitations, such as resource constraints and latency. Lightweight cryptography (LWC) aims to balance resource usage and security while minimizing system costs. Among LWC algorithms, ASCON is a potential target for implementation and cryptoanalysis. A demonstration showcases a system-on-chip (SoC) comprising a RISC-V processor and an ASCON LWC core that implemented the ASCON-128 and ASCON-Hash functions. The SoC was fabricated using a 180nm process.

Authors

Institutions

Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11044102
Primary Topic
Cryptographic Implementations and Security
Type
article
Field-Weighted Citation Impact
0.00

Funders

Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Live Demonstration: ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications

Khai-Duy Nguyen, Trong-Thuc Hoang, Tuan-Kiet Dang, Cong‐Kha Pham et al.
Cryptographic Implementations and Security
article

Live Demonstration: ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications

Khai-Duy Nguyen, Trong-Thuc Hoang, Tuan-Kiet Dang, Cong‐Kha Pham, Binh Kieu-Do-Nguyen
article en

Abstract

The use of IoT devices has increased significantly in recent years, and edge computing in IoT is seen as a new and growing trend in the technology industry. While cryptography is widely used to enhance the security of IoT devices, it also has limitations, such as resource constraints and latency. Lightweight cryptography (LWC) aims to balance resource usage and security while minimizing system costs. Among LWC algorithms, ASCON is a potential target for implementation and cryptoanalysis. A demonstration showcases a system-on-chip (SoC) comprising a RISC-V processor and an ASCON LWC core that implemented the ASCON-128 and ASCON-Hash functions. The SoC was fabricated using a 180nm process.

University of Electro-Communications (JP)
University of Tokyo
Openalex Percentile: Top 93%
Cryptographic Implementations and Security
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

Live Demonstration: ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications — Khai-Duy Nguyen, Trong-Thuc Hoang, et al. · (2025) | TGRS Research Map | TGRS