Compensation of Excess Loop Delay in Continuous-Time Incremental ∆Σ ADCs
Continuous-time (CT) Delta-Sigma (DS) ADCs are a popular choice for high resolution, medium bandwidth applications. A critical challenge is the excess-loop-delay (ELD) in the feedback path of the modulator, which causes performance degradation and instability. For free-running Delta-Sigma modulators (DSMs), performance can be fully recovered by adjusting the loop filter to restore the original noise transfer function (NTF) without ELD. For CT incremental Delta-Sigma (I-DS) ADCs, this has not been specifically investigated, but it is worth noting that the process of ELD compensation is slightly different. In this paper, we investigate the effect of ELD on I-DS ADCs and show that the performance cannot be fully recovered by NTF engineering as in the free-running case, but requires signal transfer function (STF) engineering as well. We also present solutions on how to engineer the STF and how to fully recover the performance even in the presence of ELD in CT I-DS ADCs.
Authors
- Maurits Ortmanns (ORCID: https://orcid.org/0000-0002-3547-1596)
- Joachim Becker (ORCID: https://orcid.org/0000-0002-2125-7812)
- Omar Ismail (ORCID: https://orcid.org/0009-0006-4560-1784)
- Paul Kaesser (ORCID: https://orcid.org/0009-0003-0101-8579)
Institutions
- Universität Ulm (DE)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11044169
- Citations
- 1
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.67
Funders
- National Science Foundation